Asynchronous Transfer Mode (ATM) is a class of digital switching technologies for computer networks. ATM is a cell based technology; that is, compared to common packet technologies such as X.25 or frame relay, ATM transfers short, fixed length units of information called cells. Accordingly, larger packets or protocol data units (PDU's) from a source are broken up into these fixed length cells for transmission, and then reassembled at their destination.
The Generic Flow Control (GFC) protocol as defined in ITU-T SG 13 Revised version documents I.361-TD41 and I.150-TD42 November 1994 Geneva is a one-way, link-level flow control scheme for controlling the flow of data into an ATM network. In the GFC protocol, the ATM connections are divided into two categories: controlled and uncontrolled. When a cell is received with the HALT bit set in the GFC field in the cell header, all transmit traffic is halted. When a cell is received with the SET.sub.-- A bit reset (=0), controlled traffic is halted, while uncontrolled traffic may be transmitted.
An ATM end-station typically provides a transmit data FIFO at the network interface for buffering a number of cells for transmission on the network. If the end-station provides only a single transmit data FIFO for storing both controlled and uncontrolled cells, then when GFC is enabled and GFC set.sub.-- A is deasserted, any uncontrolled cells behind a pending controlled cell are unacceptably blocked from transmission. Therefore, two transmit data FIFOs may be utilized--one for buffering uncontrolled cells for transmission, and the other buffering controlled cells.
Consider next that some form of request buffer memory, such as a DMA request FIFO, exists in the end-station for buffering DMA requests for data from host memory to the transmit data FIFOs. Consider also that the transmit data FIFO holding controlled cells becomes full. If GFC is enabled and GFC set.sub.-- A is deasserted, cells cannot flow from the transmit buffer memory holding the controlled cells. This causes "backpressure" on the DMA request FIFO. That is, once a request for a controlled cell rises to the head of the DMA request FIFO, it cannot be processed because there is no room in the controlled transmit data FIFO to accept the cell. Therefore, any uncontrolled requests behind the controlled request in the DMA request FIFO are not processed either, again causing uncontrolled cells to be unacceptably blocked from transmission. This problem can be prevented through the use of two DMA request FIFOs; however, when implementing an ATM network interface in an ASIC, the additional memory is costly in terms of gate count and areal density. An improved method for handling the transmission of flow controlled cells wherein some cells are flow controlled and some are not flow controlled is desired.